;
; Copyright (c) Microsoft Corporation.  All rights reserved.
;
;
; Use of this sample source code is subject to the terms of the Microsoft
; license agreement under which you licensed this sample source code. If
; you did not accept the terms of the license agreement, you are not
; authorized to use this sample source code. For the terms of the license,
; please see the license agreement between you and Microsoft or, if applicable,
; see the LICENSE.RTF on your install media or the root of your tools installation.
; THE SAMPLE SOURCE CODE IS PROVIDED "AS IS", WITH NO WARRANTIES OR INDEMNITIES.
;
;
; (C) Copyright 2006 Marvell International Ltd.
; All Rights Reserved
;
;----------------------------------------
;  Copyright ?2002-2003 Intel Corp. 
; ---------------------------------------

	IF  !:DEF: gpio_inc
gpio_inc	EQU	1

;
; Include File for assembly modules needing GPIO definitions


;
; For use with GPIO register GAFR0_L (gpio[15:0])
;

; AF1
;
GPIO_0_AF1                      EQU				(0x1 << 0)
GPIO_1_AF1                      EQU     		(0x1 << 2)
GPIO_2_AF1                      EQU 			(0x1 << 4)
GPIO_3_AF1                      EQU 			(0x1 << 6)
GPIO_4_AF1                      EQU 			(0x1 << 8)
GPIO_5_AF1                      EQU 			(0x1 << 10)
GPIO_6_AF1                      EQU     		(0x1 << 12)
GPIO_7_AF1                      EQU         	(0x1 << 14)
GPIO_8_AF1                      EQU     		(0x1 << 16)
GPIO_9_AF1_HZCLK                EQU     		(0x1 << 18)
GPIO_10_AF1_HZCLK               EQU     		(0x1 << 20)
GPIO_11_AF1_EXTSYNC0_CHOUT0     EQU     		(0x1 << 22)
GPIO_12_AF1_EXTSYNC1_CHOUT1     EQU     		(0x1 << 24)
GPIO_13_AF1_CLKEXT              EQU				(0x1 << 26)
GPIO_14_AF1_LVSYNC		        EQU             (0x1 << 28)
GPIO_15_AF1_PCMCIAnPCE1		    EQU             (0x1 << 30)


; AF2
;
GPIO_0_AF2				        EQU             (0x2 << 0)
GPIO_1_AF2				        EQU             (0x2 << 2)
GPIO_2_AF2				        EQU             (0x2 << 4)
GPIO_3_AF2				        EQU             (0x2 << 6)
GPIO_4_AF2				        EQU             (0x2 << 8)
GPIO_5_AF2				        EQU             (0x2 << 10)
GPIO_6_AF2				        EQU             (0x2 << 12)
GPIO_7_AF2				        EQU             (0x2 << 14)
GPIO_8_AF2				        EQU             (0x2 << 16)
GPIO_9_AF2				        EQU             (0x2 << 18)
GPIO_10_AF2				        EQU             (0x2 << 20)
GPIO_11_AF2_PWMOUT2	            EQU             (0x2 << 22)
GPIO_12_AF2_PWMOUT3	            EQU             (0x2 << 24)
GPIO_13_AF2_KPDKIN7	            EQU             (0x2 << 26)
GPIO_14_AF2				        EQU             (0x2 << 28)
GPIO_15_AF2_nCS1		        EQU             (0x2 << 30)

; AF3
;
GPIO_0_AF3	                    EQU             (0x3 << 0)
GPIO_1_AF3	                    EQU             (0x3 << 2)
GPIO_2_AF3	                    EQU             (0x3 << 4)
GPIO_3_AF3	                    EQU             (0x3 << 6)
GPIO_4_AF3	                    EQU             (0x3 << 8)
GPIO_5_AF3	                    EQU             (0x3 << 10)
GPIO_6_AF3	                    EQU             (0x3 << 12)
GPIO_7_AF3	                    EQU             (0x3 << 14)
GPIO_8_AF3	                    EQU             (0x3 << 16)
GPIO_9_AF3_CHOUT0               EQU             (0x3 << 18)
GPIO_10_AF3_CHOUT1              EQU             (0x3 << 20)
GPIO_11_AF3_48MCLK              EQU             (0x3 << 22)
GPIO_12_AF3_48MCLK              EQU             (0x3 << 24)
GPIO_13_AF3_KPMKIN7             EQU             (0x3 << 26)
GPIO_14_AF3	                    EQU             (0x3 << 28)
GPIO_15_AF3	                    EQU             (0x3 << 30)


;
; For use with GPIO register GAFR0_U (gpio[31:16])
;

; AF1
;
GPIO_16_AF1_KPMKIN5				EQU             (0x1 << 0)
GPIO_17_AF1_KPMKIN6				EQU             (0x1 << 2)
GPIO_18_AF1_RDY			        EQU             (0x1 << 4)
GPIO_19_AF1		                EQU             (0x1 << 6)
GPIO_20_AF1_DREQ0_nSDCS2		EQU             (0x1 << 8)
GPIO_21_AF1_nSDCS3				EQU             (0x1 << 10)
GPIO_22_AF1_SSPEXTCLK2_KPMKOUT7	EQU             (0x1 << 12)
GPIO_23_AF1				        EQU             (0x1 << 14)
GPIO_24_AF1				        EQU             (0x1 << 16)
GPIO_25_AF1				        EQU             (0x1 << 18)
GPIO_26_AF1_SSPRXD			    EQU             (0x1 << 20)
GPIO_27_AF1_SSPEXTCLK		    EQU             (0x1 << 22)
GPIO_28_AF1_AC97_I2S_BITCLK		EQU             (0x1 << 24)
GPIO_29_AF1_AC97SDATAIN0	    EQU             (0x1 << 26)
GPIO_30_AF1_I2SSDATAOUT	        EQU             (0x1 << 28)
GPIO_31_AF1_I2SSYNC		        EQU             (0x1 << 30)

; AF2
;
GPIO_16_AF2_PWMOUT0		        EQU             (0x2 << 0)
GPIO_17_AF2_PWMOUT1		        EQU             (0x2 << 2)
GPIO_18_AF2				        EQU             (0x2 << 4)
GPIO_19_AF2_LCS				    EQU             (0x2 << 6)
GPIO_20_AF2_MBREQ				EQU             (0x2 << 8)
GPIO_21_AF2_DVAL0		        EQU             (0x2 << 10)
GPIO_22_AF2_SSPSCLK2EN		    EQU             (0x2 << 12)
GPIO_23_AF2_SSPSCLK		        EQU             (0x2 << 14)
GPIO_24_AF2_SSPSFRM		        EQU             (0x2 << 16)
GPIO_25_AF2_SSPTXD			    EQU             (0x2 << 18)
GPIO_26_AF2				        EQU             (0x2 << 20)
GPIO_27_AF2_SSPSCLKEN			EQU             (0x2 << 22)
GPIO_28_AF2_I2SBITCLK   		EQU             (0x2 << 24)
GPIO_29_AF2_I2SSDATAIN	        EQU             (0x2 << 26)
GPIO_30_AF2_AC97SDATAOUT	    EQU             (0x2 << 28)
GPIO_31_AF2_AC97SYNC		    EQU             (0x2 << 30)

; AF3
;
GPIO_16_AF3	                    EQU             (0x3 << 0)
GPIO_17_AF3	                    EQU             (0x3 << 2)
GPIO_18_AF3	                    EQU             (0x3 << 4)
GPIO_19_AF3	                    EQU             (0x3 << 6)
GPIO_20_AF3	                    EQU             (0x3 << 8)
GPIO_21_AF3_MBGNT	            EQU             (0x3 << 10)
GPIO_22_AF3	                    EQU             (0x3 << 12)
GPIO_23_AF3	                    EQU             (0x3 << 14)
GPIO_24_AF3	                    EQU             (0x3 << 16)
GPIO_25_AF3	                    EQU             (0x3 << 18)
GPIO_26_AF3	                    EQU             (0x3 << 20)
GPIO_27_AF3	                    EQU             (0x3 << 22)
GPIO_28_AF3	                    EQU             (0x3 << 24)
GPIO_29_AF3	                    EQU             (0x3 << 26)
GPIO_30_AF3	                    EQU             (0x3 << 28)
GPIO_31_AF3	                    EQU             (0x3 << 30)


;
; For use with GPIO register GAFR1_L (gpio[47:32])
;

; AF1
;
GPIO_32_AF1_MSSCLK	            EQU             (0x1 << 0)
GPIO_33_AF1_DVAL1				EQU             (0x1 << 2)
GPIO_34_AF1_FFRXD		        EQU             (0x1 << 4)
GPIO_35_AF1_FFCTS			    EQU             (0x1 << 6)
GPIO_36_AF1_FFDCD			    EQU             (0x1 << 8)
GPIO_37_AF1_FFDSR			    EQU             (0x1 << 10)
GPIO_38_AF1_FFRI			    EQU             (0x1 << 12)
GPIO_39_AF1_KPMKIN4		        EQU             (0x1 << 14)
GPIO_40_AF1_SSPRXD2_KPMKOUT6	EQU             (0x1 << 16)
GPIO_41_AF1_KPMKOUT7			EQU             (0x1 << 18)
GPIO_42_AF1_BTRXD		        EQU             (0x1 << 20)
GPIO_43_AF1_ICPTXD		        EQU             (0x1 << 22)
GPIO_44_AF1_BTCTS			    EQU             (0x1 << 24)
GPIO_45_AF1_AC97SYSCLK			EQU             (0x1 << 26)
GPIO_46_AF1_ICPRXD		        EQU             (0x1 << 28)
GPIO_47_AF1_STDTXD			    EQU             (0x1 << 30)

; AF2
;
GPIO_32_AF2_MMCLK				EQU             (0x2 << 0)
GPIO_33_AF2_nCS5		        EQU             (0x2 << 2)
GPIO_34_AF2_KPMKIN3		        EQU             (0x2 << 4)
GPIO_35_AF2_KPMKOUT6			EQU             (0x2 << 6)
GPIO_36_AF2_SSPSCLK2			EQU             (0x2 << 8)
GPIO_37_AF2_SSPSFRM2			EQU             (0x2 << 10)
GPIO_38_AF2_KPMKIN4_SSPTXD2		EQU             (0x2 << 12)
GPIO_39_AF2_FFTXD		        EQU             (0x2 << 14)
GPIO_40_AF2_FFDTR			    EQU             (0x2 << 16)
GPIO_41_AF2_FFRTS			    EQU             (0x2 << 18)
GPIO_42_AF2_ICPRXD				EQU             (0x2 << 20)
GPIO_43_AF2_BTTXD		        EQU             (0x2 << 22)
GPIO_44_AF2				        EQU             (0x2 << 24)
GPIO_45_AF2_BTRTS			    EQU             (0x2 << 26)
GPIO_46_AF2_STDRXD_PWMOUT2		EQU             (0x2 << 28)
GPIO_47_AF2_ICPTXD		        EQU             (0x2 << 30)

; AF3
;
GPIO_32_AF3	                    EQU             (0x3 << 0)
GPIO_33_AF3_MBGNT	            EQU             (0x3 << 2)
GPIO_34_AF3_SSPSCLK3	        EQU             (0x3 << 4)
GPIO_35_AF3_SSPTXD3	            EQU             (0x3 << 6)
GPIO_36_AF3_KPMKIN7	            EQU             (0x3 << 8)
GPIO_37_AF3_KPMKIN3	            EQU             (0x3 << 10)
GPIO_38_AF3	                    EQU             (0x3 << 12)
GPIO_39_AF3_SSPSFRM3	        EQU             (0x3 << 14)
GPIO_40_AF3	                    EQU             (0x3 << 16)
GPIO_41_AF3_SSPSRXD3	        EQU             (0x3 << 18)
GPIO_42_AF3	                    EQU             (0x3 << 20)
GPIO_43_AF3	                    EQU             (0x3 << 22)
GPIO_44_AF3	                    EQU             (0x3 << 24)
GPIO_45_AF3	                    EQU             (0x3 << 26)
GPIO_46_AF3	                    EQU             (0x3 << 28)
GPIO_47_AF3_PWMOUT3	            EQU             (0x3 << 30)


;
; For use with GPIO register GAFR1_U (gpio[63:48])
;

; AF1
;
GPIO_48_AF1_BBOBDAT1			EQU             (0x1 << 0)
GPIO_49_AF1				        EQU             (0x1 << 2)
GPIO_50_AF1_BBOBDAT2			EQU             (0x1 << 4)
GPIO_51_AF1_BBOBDAT3			EQU             (0x1 << 6)
GPIO_52_AF1_BBOBCLK				EQU             (0x1 << 8)
GPIO_53_AF1_BBOBSTB 	        EQU             (0x1 << 10)
GPIO_54_AF1		                EQU             (0x1 << 12)
GPIO_55_AF1				        EQU             (0x1 << 14)
GPIO_56_AF1_PCMCIAnPWAIT		EQU             (0x1 << 16)
GPIO_57_AF1_PCMCIAnIOIS16		EQU             (0x1 << 18)
GPIO_58_AF1				        EQU             (0x1 << 20)
GPIO_59_AF1				        EQU             (0x1 << 22)
GPIO_60_AF1				        EQU             (0x1 << 24)
GPIO_61_AF1				        EQU             (0x1 << 26)
GPIO_62_AF1				        EQU             (0x1 << 28)
GPIO_63_AF1				        EQU             (0x1 << 30)

; AF2
;
GPIO_48_AF2_PCMCIAnPOE		    EQU             (0x2 << 0)
GPIO_49_AF2_nPWE		        EQU             (0x2 << 2)
GPIO_50_AF2_PCMCIAnPIOR		    EQU             (0x2 << 4)
GPIO_51_AF2_PCMCIAnPIOW		    EQU             (0x2 << 6)
GPIO_52_AF2_SSPSCLK3		    EQU             (0x2 << 8)
GPIO_53_AF2		                EQU             (0x2 << 10)
GPIO_54_AF2_BBOBWAIT_PCMCIAnPCE2		    EQU             (0x2 << 12)
GPIO_55_AF2_BBIBDAT1_PCMCIAnPREG EQU            (0x2 << 14)
GPIO_56_AF2_BBIBDAT2			EQU             (0x2 << 16)
GPIO_57_AF2_BBIBDAT3			EQU             (0x2 << 18)
GPIO_58_AF2_LDD0		        EQU             (0x2 << 20)
GPIO_59_AF2_LDD1		        EQU             (0x2 << 22)
GPIO_60_AF2_LDD2		        EQU             (0x2 << 24)
GPIO_61_AF2_LDD3		        EQU             (0x2 << 26)
GPIO_62_AF2_LDD4		        EQU             (0x2 << 28)
GPIO_63_AF2_LDD5		        EQU             (0x2 << 30)

; AF3
;
GPIO_48_AF3                     EQU             (0x3 << 0)
GPIO_49_AF3                     EQU             (0x3 << 2)
GPIO_50_AF3	                    EQU             (0x3 << 4)
GPIO_51_AF3	                    EQU             (0x3 << 6)
GPIO_52_AF3	                    EQU             (0x3 << 8)
GPIO_53_AF3	                    EQU             (0x3 << 10)
GPIO_54_AF3	                    EQU             (0x3 << 12)
GPIO_55_AF3	                    EQU             (0x3 << 14)
GPIO_56_AF3	                    EQU             (0x3 << 16)
GPIO_57_AF3	                    EQU             (0x3 << 18)
GPIO_58_AF3	                    EQU             (0x3 << 20)
GPIO_59_AF3	                    EQU             (0x3 << 22)
GPIO_60_AF3	                    EQU             (0x3 << 24)
GPIO_61_AF3	                    EQU             (0x3 << 26)
GPIO_62_AF3	                    EQU             (0x3 << 28)
GPIO_63_AF3	                    EQU             (0x3 << 30)


;
; For use with GPIO register GAFR2_L (gpio[79:64])
;

; AF1
GPIO_64_AF1				        EQU             (0x1 << 0)
GPIO_65_AF1				        EQU             (0x1 << 2)
GPIO_66_AF1		                EQU             (0x1 << 4)
GPIO_67_AF1		                EQU             (0x1 << 6)
GPIO_68_AF1		                EQU             (0x1 << 8)
GPIO_69_AF1		                EQU             (0x1 << 10)
GPIO_70_AF1		                EQU             (0x1 << 12)
GPIO_71_AF1		                EQU             (0x1 << 14)
GPIO_72_AF1		                EQU             (0x1 << 16)
GPIO_73_AF1		                EQU             (0x1 << 18)
GPIO_74_AF1				        EQU             (0x1 << 20)
GPIO_75_AF1				        EQU             (0x1 << 22)
GPIO_76_AF1				        EQU             (0x1 << 24)
GPIO_77_AF1				        EQU             (0x1 << 26)
GPIO_78_AF1_PCMCIAnPCE2			EQU             (0x1 << 28)
GPIO_79_AF1_PCMCIAPSKTSEL		EQU             (0x1 << 30)

; AF2
;
GPIO_64_AF2_LDD6		        EQU             (0x2 << 0)
GPIO_65_AF2_LDD7		        EQU             (0x2 << 2)
GPIO_66_AF2_LDD8		        EQU             (0x2 << 4)
GPIO_67_AF2_LDD9		        EQU             (0x2 << 6)
GPIO_68_AF2_LDD10		        EQU             (0x2 << 8)
GPIO_69_AF2_LDD11		        EQU             (0x2 << 10)
GPIO_70_AF2_LDD12		        EQU             (0x2 << 12)
GPIO_71_AF2_LDD13		        EQU             (0x2 << 14)
GPIO_72_AF2_LDD14		        EQU             (0x2 << 16)
GPIO_73_AF2_LDD15		        EQU             (0x2 << 18)
GPIO_74_AF2_LFCLKRD	            EQU             (0x2 << 20)
GPIO_75_AF2_LLCLKA0	            EQU             (0x2 << 22)
GPIO_76_AF2_LPCLKWR	            EQU             (0x2 << 24)
GPIO_77_AF2_LBIAS	            EQU             (0x2 << 26)
GPIO_78_AF2_nCS2		        EQU             (0x2 << 28)
GPIO_79_AF2_nCS3		        EQU             (0x2 << 30)

; AF3
;
GPIO_64_AF3	                    EQU             (0x3 << 0)
GPIO_65_AF3	                    EQU             (0x3 << 2)
GPIO_66_AF3	                    EQU             (0x3 << 4)
GPIO_67_AF3	                    EQU             (0x3 << 6)
GPIO_68_AF3	                    EQU             (0x3 << 8)
GPIO_69_AF3	                    EQU             (0x3 << 10)
GPIO_70_AF3	                    EQU             (0x3 << 12)
GPIO_71_AF3	                    EQU             (0x3 << 14)
GPIO_72_AF3	                    EQU             (0x3 << 16)
GPIO_73_AF3	                    EQU             (0x3 << 18)
GPIO_74_AF3	                    EQU             (0x3 << 20)
GPIO_75_AF3	                    EQU             (0x3 << 22)
GPIO_76_AF3	                    EQU             (0x3 << 24)
GPIO_77_AF3	                    EQU             (0x3 << 26)
GPIO_78_AF3	                    EQU             (0x3 << 28)
GPIO_79_AF3	                    EQU             (0x3 << 30)

;
; For use with GPIO register GAFR2_U (gpio[95:80])
;

; AF1
;
GPIO_80_AF1_DREQ1				EQU             (0x1 << 0)
GPIO_81_AF1_SSPTXD3				EQU             (0x1 << 2)
GPIO_82_AF1_SSPRXD3				EQU             (0x1 << 4)
GPIO_83_AF1_SSPSFRM3			EQU             (0x1 << 6)
GPIO_84_AF1				        EQU             (0x1 << 8)
GPIO_85_AF1_PCMCIAnPCE1	        EQU             (0x1 << 10)
GPIO_86_AF1				        EQU             (0x1 << 12)
GPIO_87_AF1				        EQU             (0x1 << 14)
GPIO_88_AF1_USBHPWR0			EQU             (0x1 << 16)
GPIO_89_AF1_AC97SYSCLK			EQU             (0x1 << 18)
GPIO_90_AF1_KPMKIN5				EQU             (0x1 << 20)
GPIO_91_AF1_KPMKIN6				EQU             (0x1 << 22)
GPIO_92_AF1_MMDAT0				EQU             (0x1 << 24)
GPIO_93_AF1_KPDKIN0				EQU             (0x1 << 26)
GPIO_94_AF1_KPDKIN1				EQU             (0x1 << 28)
GPIO_95_AF1_KPDKIN2				EQU             (0x1 << 30)


; AF2
;
GPIO_80_AF2_MBREQ_nCS4		    EQU             (0x2 << 0)
GPIO_81_AF2_BBOBDAT0		    EQU             (0x2 << 2)
GPIO_82_AF2_BBIBDAT0		    EQU             (0x2 << 4)
GPIO_83_AF2_BBIBCLK		        EQU             (0x2 << 6)
GPIO_84_AF2_BBIBSTB		        EQU             (0x2 << 8)
GPIO_85_AF2_BBIBWAIT		    EQU             (0x2 << 10)
GPIO_86_AF2_LDD16		        EQU             (0x2 << 12)
GPIO_87_AF2_LDD17		        EQU             (0x2 << 14)
GPIO_88_AF2		                EQU             (0x2 << 16)
GPIO_89_AF2_USBHPEN0		    EQU             (0x2 << 18)
GPIO_90_AF2_URST		        EQU             (0x2 << 20)
GPIO_91_AF2_UCLK		        EQU             (0x2 << 22)
GPIO_92_AF2_MSBS		        EQU             (0x2 << 24)
GPIO_93_AF2		                EQU             (0x2 << 26)
GPIO_94_AF2		                EQU             (0x2 << 28)
GPIO_95_AF2		                EQU             (0x2 << 30)



; AF3
;
GPIO_80_AF3	                    EQU             (0x3 << 0)
GPIO_81_AF3         		    EQU             (0x3 << 2)
GPIO_82_AF3         		    EQU             (0x3 << 4)
GPIO_83_AF3     		        EQU             (0x3 << 6)
GPIO_84_AF3     		        EQU             (0x3 << 8)
GPIO_85_AF3         		    EQU             (0x3 << 10)
GPIO_86_AF3     		        EQU             (0x3 << 12)
GPIO_87_AF3     		        EQU             (0x3 << 14)
GPIO_88_AF3		                EQU             (0x3 << 16)
GPIO_89_AF3         		    EQU             (0x3 << 18)
GPIO_90_AF3     		        EQU             (0x3 << 20)
GPIO_91_AF3     		        EQU             (0x3 << 22)
GPIO_92_AF3     		        EQU             (0x3 << 24)
GPIO_93_AF3		                EQU             (0x3 << 26)
GPIO_94_AF3		                EQU             (0x3 << 28)
GPIO_95_AF3		                EQU             (0x3 << 30)


;
; For use with GPIO register GAFR3_L (gpio[111:96])
;

; AF1
;
GPIO_96_AF1_KPDKIN3             EQU             (0x1 << 0)
GPIO_97_AF1_KPDKIN4             EQU             (0x1 << 2)
GPIO_98_AF1_KPDKIN5_AC97SYSCLK  EQU             (0x1 << 4)
GPIO_99_AF1_KPDKIN6             EQU             (0x1 << 6)
GPIO_100_AF1_KPMKIN0            EQU             (0x1 << 8)
GPIO_101_AF1_KPMKIN1            EQU             (0x1 << 10)
GPIO_102_AF1_KPMKIN2            EQU             (0x1 << 12)
GPIO_103_AF1                    EQU             (0x1 << 14)
GPIO_104_AF1                    EQU             (0x1 << 16)
GPIO_105_AF1                    EQU             (0x1 << 18)
GPIO_106_AF1                    EQU             (0x1 << 20)
GPIO_107_AF1                    EQU             (0x1 << 22)
GPIO_108_AF1_CHOUT0             EQU             (0x1 << 24)
GPIO_109_AF1_MMDAT1             EQU             (0x1 << 26)
GPIO_110_AF1_MMDAT2             EQU             (0x1 << 28)
GPIO_111_AF1_MMDAT3             EQU             (0x1 << 30)

; AF2
;
GPIO_96_AF2_MBREQ_DVAL1         EQU             (0x2 << 0)
GPIO_97_AF2_DREQ1_MBGNT         EQU             (0x2 << 2)
GPIO_98_AF2                     EQU             (0x2 << 4)
GPIO_99_AF2_AC97SDATAIN1        EQU             (0x2 << 6)
GPIO_100_AF2                    EQU             (0x2 << 8)
GPIO_101_AF2                    EQU             (0x2 << 10)
GPIO_102_AF2                    EQU             (0x2 << 12)
GPIO_103_AF2_KPMKOUT0           EQU             (0x2 << 14)
GPIO_104_AF2_KPMKOUT1           EQU             (0x2 << 16)
GPIO_105_AF2_KPMKOUT2           EQU             (0x2 << 18)
GPIO_106_AF2_KPMKOUT3           EQU             (0x2 << 20)
GPIO_107_AF2_KPMKOUT4           EQU             (0x2 << 22)
GPIO_108_AF2_KPMKOUT5           EQU             (0x2 << 24)
GPIO_109_AF2_MSSDIO             EQU             (0x2 << 26)
GPIO_110_AF2                    EQU             (0x2 << 28)
GPIO_111_AF2                    EQU             (0x2 << 30)

; AF3
;
GPIO_96_AF3                     EQU             (0x3 << 0)
GPIO_97_AF3_KPMKIN3             EQU             (0x3 << 2)
GPIO_98_AF3_KPMKIN4             EQU             (0x3 << 4)
GPIO_99_AF3_KPMKIN5             EQU             (0x3 << 6)
GPIO_100_AF3                    EQU             (0x3 << 8)
GPIO_101_AF3                    EQU             (0x3 << 10)
GPIO_102_AF3                    EQU             (0x3 << 12)
GPIO_103_AF3                    EQU             (0x3 << 14)
GPIO_104_AF3                    EQU             (0x3 << 16)
GPIO_105_AF3                    EQU             (0x3 << 18)
GPIO_106_AF3                    EQU             (0x3 << 20)
GPIO_107_AF3                    EQU             (0x3 << 22)
GPIO_108_AF3                    EQU             (0x3 << 24)
GPIO_109_AF3                    EQU             (0x3 << 26)
GPIO_110_AF3                    EQU             (0x3 << 28)
GPIO_111_AF3                    EQU             (0x3 << 30)


;
; For use with GPIO register GAFR3_U (gpio[120:112])
;

; AF1
;
GPIO_112_AF1_MMCMD              EQU             (0x1 << 0)
GPIO_113_AF1_I2SSYSCLK          EQU             (0x1 << 2)
GPIO_114_AF1                    EQU             (0x1 << 4)
GPIO_115_AF1_DREQ0              EQU             (0x1 << 6)
GPIO_116_AF1_DVAL0              EQU             (0x1 << 8)
GPIO_117_AF1_SCL                EQU             (0x1 << 10)
GPIO_118_AF1_SDA                EQU             (0x1 << 12)
GPIO_119_AF1_USBHPWR1           EQU             (0x1 << 14)
GPIO_120_AF1                    EQU             (0x1 << 16)

; AF2
;
GPIO_112_AF2_MSINS              EQU             (0x2 << 0)
GPIO_113_AF2_AC97nRESET         EQU             (0x2 << 2)
GPIO_114_AF2_UVS0               EQU             (0x2 << 4)
GPIO_115_AF2_nUVS1              EQU             (0x2 << 6)
GPIO_116_AF2_nUVS2              EQU             (0x2 << 8)
GPIO_117_AF2                    EQU             (0x2 << 10)
GPIO_118_AF2                    EQU             (0x2 << 12)
GPIO_119_AF2                    EQU             (0x2 << 14)
GPIO_120_AF2_USBHPEN1           EQU             (0x2 << 16)

; AF3
;
GPIO_112_AF3                    EQU             (0x3 << 0)
GPIO_113_AF3                    EQU             (0x3 << 2)
GPIO_114_AF3                    EQU             (0x3 << 4)
GPIO_115_AF3_MBREQ              EQU             (0x3 << 6)
GPIO_116_AF3_MBGNT              EQU             (0x3 << 8)
GPIO_117_AF3                    EQU             (0x3 << 10)
GPIO_118_AF3                    EQU             (0x3 << 12)
GPIO_119_AF3                    EQU             (0x3 << 14)
GPIO_120_AF3                    EQU             (0x3 << 16)



    ENDIF
    END
